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Fences and Stability in Weak Memory Models
Constructing a Weak Memory Model
USENIX ATC '19 - The Semantics of Transactions and Weak Memory in x86, Power, ARM, and C++
Assertional reasoning for weak memory, Ernie Cohen
Automatically Comparing Memory Consistency Models
Bridging the Gap Between Programming Languages and Hardware Weak Memory Models
Advanced Topics: Hardware Memory Barriers
From Weak to Weedy: Effective Use of Memory Barriers in the ARM Linux Kernel - W. Deacon, ARM
Multiprocessor behaviour - what can't you rely on - Peter Sewell
Fix Your Short Term Memory Loss – Hippocampus Repair – Dr.Berg
From C/C++11 to Power and ARM: What is Shared-Memory Concurrency Anyway
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Last Updated: September 30, 2026
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In parallel programs, threads communicate according to the Due to compiler and hardware optimizations, modern programming languages (PLs) do not provide sequential consistent Nathan Chong, Arm; Tyler Sorensen and John Wickerson, Imperial College London Best Paper at PLDI 2018 Concurrent programming (particularly verified concurrent programming) is usually based on sequentially consistent (SC) Paper and supplementary material: ... In this video, we discuss x86 hardware The ARMv7/v8 architectures feature weakly-ordered This talk will describe the behaviour of the architectural abstraction for x86, ARM, and IBM Power multiprocessors, based on ... Get access to my FREE resources drbrg.co/3VilVFu Just so you know, my full line of high-quality supplements is ...
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