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DE Lab: EXP 3_ Part-2: Verfication of Decoder (3x8) using IC 74138 by Dr. Manish K Singh
3 to 8 Decoder Design
IC 74138 Decoder on Breadboard, Build 3:8 Decoder with 74138, #decoders, #74138decoder, #IC74138,
Experiments with the 74LS138 - Making an 8 Bit pipelined CPU - Part 5
Implement the following using 74138 decoder/logic design lectures-D K Prabitha
Implement full adder using IC-74138.
Circuits Design using Decoder IC 74138-II
74138, design the memory block controlled by Y0 is in the range 0000H to 1FFFH
IC 74138 decoder: Implementation of Combinational circuit
Full Adder Implementation using Decoder
Circuits Design using Decoder IC 74138-III
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Last Updated: September 27, 2026
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Dr. Manish Kumar Singh demonstrates the practical implementation and functionality of a 3x8 decoder using the 74LS138 IC. The experiment involves verifying the active low outputs against a truth table for all input combinations. Welcome to my YouTube Channel : DEHRI DIGITAL CIRCUITS ,this channel is your source for learning everything related to ... In this video I try a few ways of Implement the following multiple output function ... going to be high except y7 is only long now CircuitrysimplifiedbyDr.Shobha Video describes implementation of combinational circuit Digital Electronics: Full Adder Implementation